UnnamedOS
pic.c
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1 
13 #include <common.h>
14 #include <interrupts/pic.h>
15 
16 #define PIC1_CMD 0x20
17 #define PIC1_DATA 0x21
18 #define PIC2_CMD 0xA0
19 #define PIC2_DATA 0xA1
20 #define PIC_EOI 0x20
21 #define INT_IRQ0 0x20
22 #define INT_IRQ8 0x28
23 
24 void pic_init() {
26  print("PIC init ... ");
35  uint8_t irq0 = INT_IRQ0, irq8 = INT_IRQ8;
36  // PIC 1 (master) (we use io_wait in case of slow PICs)
37  outb(PIC1_CMD, 0x11); io_wait(); // ICW1: Initialize PIC1 + send ICW4
38  outb(PIC1_DATA, irq0); io_wait(); // ICW2: IRQ0 interrupt vector
39  outb(PIC1_DATA, 0x04); io_wait(); // ICW3: Slave on IRQ2 (bitmask!)
40  outb(PIC1_DATA, 0x01); io_wait(); // ICW4: 8086 flag
41  outb(PIC1_DATA, 0x00); io_wait(); // demask and enable all IRQs
42  // PIC 2 (slave)
43  outb(PIC2_CMD, 0x11); io_wait(); // ICW1: Initialize PIC2 + send ICW4
44  outb(PIC2_DATA, irq8); io_wait(); // ICW2: IRQ8 interrupt vector
45  outb(PIC2_DATA, 0x02); io_wait(); // ICW3: Slave on IRQ2
46  outb(PIC2_DATA, 0x01); io_wait(); // ICW4: 8086 flag
47  outb(PIC2_DATA, 0x00); io_wait(); // demask and enable all IRQs
53  println("%2aok%a. IRQ0=INT%02x, IRQ8=INT%02x.", irq0, irq8);
54 }
55 
61 void pic_send_eoi(uint8_t intr) {
63  if (intr - INT_IRQ0 >= 0x08)
64  outb(PIC2_CMD, PIC_EOI);
65  outb(PIC1_CMD, PIC_EOI);
66 }
67 
void pic_init()
Initializes the PIC.
Definition: pic.c:25
void pic_send_eoi(uint8_t intr)
Sends an "end of interrupt" signal.
Definition: pic.c:61
#define PIC2_DATA
the slave PIC&#39;s data port
Definition: pic.c:19
#define INT_IRQ0
where we want to map the master PIC&#39;s IRQs
Definition: pic.c:21
#define PIC_EOI
"end of interrupt" signals that an IRQ has been handled
Definition: pic.c:20
#define PIC1_DATA
the master PIC&#39;s data port
Definition: pic.c:17
#define INT_IRQ8
where we want to map the slave PIC&#39;s IRQs
Definition: pic.c:22
#define PIC1_CMD
the master PIC&#39;s command port
Definition: pic.c:16
#define PIC2_CMD
the slave PIC&#39;s command port
Definition: pic.c:18